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NXP Semiconductors /LPC408x_7x /UART0 /DLM

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Interpret as DLM

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DLMSB0RESERVED

Description

Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider (DLAB =1).

Fields

DLMSB

The UARTn Divisor Latch MSB Register, along with the U0DLL register, determines the baud rate of the UARTn.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data